The present invention relates to power switching devices. More specifically, the present invention relates to a power switching device for high frequency applications which has a relatively low "on resistance."
Metal-oxide semiconductor field effect transistors (MOSFETs) have become the standard power switching device because of their fast switching capabilities. Unfortunately, as the breakdown voltages of power MOSFETs increase, a correlative increase in device "on resistance," R.sub.ON, is encountered. This undesirable increase is largely a result of the high resistivity of the semiconductor layer which makes the increase in breakdown voltage possible. Increased R.sub.ON, in turn, translates into conduction losses and increasingly inefficient operation. The relationship between R.sub.ON and the device breakdown voltage, V.sub.B, is approximated by the equation: EQU R.sub.ON.apprxeq.aV.sub.B.sup.2.5 (1)
That is, for every doubling of V.sub.B, R.sub.ON is increased by a factor of 5.66. Thus, despite their favorable switching characteristics, at some breakdown voltage, standard power MOSFETs become too inefficient for high power operation.
In contrast, insulated gate bipolar transistors (IGBTs) have a lower effective RON than MOSFETs as a result of a four layer structure which facilitates the injection of minority carriers into the high resistivity region. Unfortunately, the injection of these minority carriers results in slower devices which cannot match the switching capabilities of MOSFETs. This is due to the delay required to build up enough minority carriers in the high resistivity region before an IGBT is fully turned on. Similarly, the IGBT experiences a delay turning off because of the time required for the same minority carriers to be removed from this region.
In addition, because the four layer structure of an IGBT is similar to that of a thyristor, if the concentration of minority carriers in the high resistivity region exceeds a certain threshold, the IGBT ceases to behave like a transistor and goes into a latching mode. This behavior is described in detail in U.S. Pat. No. 4,199,774, issued on Apr. 22, 1980, the entire specification of which is incorporated herein by reference. Several techniques have been employed to reduce the susceptibility of IGBTs to latching. One of the most effective techniques involves irradiating the device with electrons after completion of standard semiconductor processing. Other techniques include unique device cell layout, source ballasting, and increasing the doping of the body region of the device. For more detailed descriptions of some of these techniques please see Comparison of 300-, 600-, and 1200-V n-Channel Insulated Gate Transistors, Chow et al., IEEE Transactions on Electron Device Letters, Vol. EDL-6, No. 4, April 1985, pp. 161-163, and The Insulated Gate Transistor: A New Three-Terminal MOS-Controlled Bipolar Power Device, Baliga et al., IEEE Transactions on Electron Devices, Vol. ED-31, No. 6, June 1984, pp. 821-828, both of which are incorporated herein by reference in their entirety. Unfortunately, while these techniques have had varying measures of success in reducing latching susceptibility, the devices remain slower than MOSFETs operating at similar power levels.
A power switching device is therefore desirable which combines the switching speed of a power MOSFET with the low "on resistance" of an IGBT.